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| author | Bunnaroath Sou <bsou@sifive.com> | 2019-03-01 23:24:36 -0800 |
|---|---|---|
| committer | Bunnaroath Sou <bsou@sifive.com> | 2019-03-01 23:24:36 -0800 |
| commit | 3cd57c399b080cc3eee813c339258fbb287bf95e (patch) | |
| tree | 2efee76ed7a719364fc916307aacf8a44927c005 /bsp/coreip-e76/design.dts | |
| parent | e7a3c3a2999a7b1ffbab96b5bc83061ca6f387d3 (diff) | |
E76, S76 pmp not working, floating compiler/linker not working
Diffstat (limited to 'bsp/coreip-e76/design.dts')
| -rw-r--r-- | bsp/coreip-e76/design.dts | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/bsp/coreip-e76/design.dts b/bsp/coreip-e76/design.dts index 49bd3de..6d94a9b 100644 --- a/bsp/coreip-e76/design.dts +++ b/bsp/coreip-e76/design.dts @@ -40,10 +40,6 @@ #size-cells = <1>; compatible = "SiFive,FE710G-soc", "fe710-soc", "sifive-soc", "simple-bus"; ranges; - pmp: pmp@0 { - compatible = "riscv,pmp"; - regions = <8>; - }; L11: axi4-periph-port@20000000 { #address-cells = <1>; #size-cells = <1>; |