From 8fd7e5e623647866db88b632347261e5d9f30da1 Mon Sep 17 00:00:00 2001 From: Silvan Jegen Date: Sat, 10 Aug 2019 17:40:59 +0200 Subject: Implement first version of ISR --- software/first/delay.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'software/first/delay.S') diff --git a/software/first/delay.S b/software/first/delay.S index 4df998a..656625f 100644 --- a/software/first/delay.S +++ b/software/first/delay.S @@ -16,10 +16,8 @@ delay: li t2, MTIME_FREQUENCY # get clock freq (approx.) mul t2, t2, a0 # multiply milliseconds with freq add t2, t1, t2 # target mtime is now in t2 - -1: - lw t1, 0(t0) # load value of the timer - blt t1, t2, 1b # keep looping until target mtime has been reached + li t3, MTIMECMP # load address of MTIMECMP register + sw t2, 0(t3) # store target time to MTIMECMP register. This only stores 32 bits so I am not sure if that is correct... lw ra, 12(sp) # load return address addi sp, sp, 16 # deallocate stack frame -- cgit v1.2.3